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The 32-kHz low-power clock oscillator offers numerous advantages over conventional oscillator circuits based on a CMOS inverter. Such inverter circuits present problems, for example, supply currents fluctuate widely over a 3V to 6V supply range, while current consumption below 250 µA is difficult to attain. Also, operation can be unreliable with wide variations in the supply voltage and the inverter’s input characteristics are subject to wide tolerances and differences among manufacturers. The circuit shown here solves the above problems. Drawing just 13 µA from a 3V supply, it consists of a one-transistor amplifier/oscillator (T1) and a low-power comparator/reference device (IC1).

Very Low Power 32kHz Oscillator Circuit Diagram

The base of T1 is biased at 1.25 V using R5/R4 and the reference in IC1. T1 may be any small-signal transistor with a decent beta of 100 or so at 5 µA (defined here by R3, fixing the collector voltage at about 1 V below Vcc). The amplifier’s nominal gain is approximately 2 V/V. The quartz crystal combined with load capacitors C1 and C3 forms a feedback path around T1, whose 180 degrees of phase shift causes the oscillation. The bias voltage of 1.25 V for the comparator inside the MAX931 is defined by the reference via R2. The comparator’s input swing is thus accurately centred around the reference voltage.

Operating at 3 V and 32 kHz, IC1 draws just 7 µA. The comparator output can source and sink 40 mA and 5 mA respectively, which is ample for most low-power loads. However, the moderate rise/fall times of 500 ns and 100 ns respectively can cause standard, high-speed CMOS logic to draw higher than usual switching currents. The optional 74HC14 Schmitt trigger shown at the circuit output can handle the comparator’s rise/fall times with only a small penalty in supply current.

 

 

 

Source by : Streampowers

Most engineers will recognise the problem: Your circuit needs a stable 1 or 2 MHz clock generator (in the author’s case it was for a Pong game using an old AY3-8500). A suitable crystal is not to hand so you cobble together an RC oscillator (there are plenty of circuits for such a design). Now it turns out that you don’t have exactly the right capacitor so a preset pot is add e d to allow some adjustment . Before you know it the clock circuit is taking up more space on the board than you had hoped. 

Providing the application does not demand a precise clock source a tiny 8-pin microcontroller may offer a better solution to the problem. It needs no additional external components and an old ATtiny15 can be found quite cheaply. Another advantage of the solution is that clock frequency adjustment does not involve changing external components and is not subject to component tolerances. 

The microcontroller’s internal RC oscillator is already accurately calibrated to 1.6 MHz. With its inbuilt PLL, internal Timer 1 can achieve up to 25.6 MHz [2]. By configuring internal dividers the timer can output a frequency in range of roughly 50 kHz up to 12 MHz from an output pin. The difference between calculated and the actual output frequency increases at higher frequencies. A meaningful upper limit of about 2 MHz is a practical value and even at this frequency the deviation from the calculated value is about 15 %.

The circuit diagram could hardly be simpler, aside from the power supply connections the output signal on pin 6 (PB1) is the only other connection necessary.The example program, written in Assembler is just 15 lines long! With a program this short comments are almost super fluous but are included for clarity. The code can be downloaded from the Elektor website [1]. 

The program only needs to initialise the timer which then runs independently of processor control to output the clock sign al . The processor can then be put into sleep mode to memory used up the remaining 99 % is free for use for other tasks if required. 

The OSCCAL register contains a calibration byte which allows some adjustment of the CPU clock. This gives a certain degree of fine tuning of the output frequency. A recommendation in the Atmel data sheet indicates that the CPU clock frequency should not be greater than 1.75 MHz otherwise timer operation cannot be guaranteed. 

The more recent ATtiny45 can be substituted for the ATtiny15. In this case the CK SEL fuses should be set to put the chip’s Timer 1 into ATtiny15- compatible mode [3]. After adjustment to the program it will now be possible to obtain a higher (or more exact) frequency from the timer, the ATtiny45’s PLL can operate up to 64 MHz. Link

This design resulted from the need for a partial replacement of the well-known 8038 chip,  which is no longer in production and there fore hardly obtainable.

An existing design for driving an LVDT sensor (Linear Variable Differential Transformer),  where the 8038 was used as a variable sine  wave oscillator, had to be modernised. It may  have been possible to replace the 8038 with an  Exar 2206, except that this chip couldn’t be used  with the supply voltage used. For this reason we  looked for a replacement using standard components, which should always be available.

In this circuit two opamps from a TL074 (IC1.A  and B) are used to generate a triangular wave,  which can be set to a wide range of frequencies using P1. The following differential amplifier using T1 and T2 is configured in such a way  that the triangular waveform is converted into  a reasonably looking sinusoidal waveform. P2  is used to adjust the distortion to a minimum.

The third opamp (IC1.C) is configured as a  difference amplifier, which presents the sine  wave at its output. This signal is then buffered by the last opamp (IC1.D). Any offset at the  output can be nulled using P3.

Author : Jac Hettema - Copyright : Elektor